IBM has announced the world's first 2nm EUV chip

IBM has announced that it has made the world's first semiconductor chip with a 2nm process.

In terms of core metrics, IBM said the transistor density (MTR /mm2) of the 2nm chip was 333.33, nearly double TSMC's 5nm density and higher than the 292.21 MTR /mm2 estimated for TSMC's 3nm process.

In other words, 50 billion transistors could fit into an area of 150 square millimeters, or the size of a fingernail.

At the same time, IBM says it will perform 45 percent better than the current 7nm with the same power consumption, and deliver the same performance with 75 percent less power consumption.
In fact, IBM was also the first to make 7nm (2015) and 5nm (2017) chips, taking an early lead in defining metrics such as voltage.
Going back to the 2nm, it's GAA (wrappers around the gate transistor), three layers. According to IBM, this is the first use of the bottom dielectric isolation channel, which can achieve a gate length of 12 nm, and its internal spacer is a second-generation dry design that will help in the development of nanosheets. This is also the first time that EUV has been used to expose part of the FEOL process.
It's important to note that IBM doesn't have its own fabs. In 2014, it sold its manufacturing facility to Gchip, but the two signed a 10-year cooperation agreement. IBM also maintains partnerships with Samsung and Intel.
With regard to GAA transistor technology, Samsung 3nm, Intel 5nm and TSMC 2nm will be used for the first time.